S3C72F5 m equivalent, the s3c72f5 single-chip cmos microcontroller has been designed for high performance using samsungs newest 4-bit cpu core/ sam47 (samsung arrangeable m.
SUMMARY
Memory
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* 544 × 4-bit RAM (excluding LCD display RAM) 16,384 × 8-bit ROM Watch Timer
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* Time interval generation: 0.5 s, 3.9 ms at 32768 H.
which require LCD functions. Up to 39 pins of the 100-pin QFP package can be dedicated to I/O. Eight vectored interrupts.
Table 1
–1. S3C72F5 Pin Descriptions Pin Name P0.0 P0.1 P0.2 P0.3 Pin Type I/O Description 4-bit I/O port. 1-bit and 4-bit read/write and test are possible. Individual pins are software configurable as input or output. Individual pins.
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